Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined "classical" design and test topics and solutions for IC test technology and fault-tolerant systems.
Design and Test Technology for Dependable Systems-on-Chip
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$407.00
Description
Designing reliable and dependable embedded systems has become increasingly important as the failure of these systems in an automotive, aerospace or nuclear application can have serious consequences. Design and Test Technology for Dependable Systems-on-Chip covers aspects of system design and efficient modelling, and also introduces various fault models and fault mechanisms associated with digital circuits integrated into System on Chip (SoC), Multi-Processor System-on Chip (MPSoC) or Network on Chip (NoC). This book provides insight into refined "classical" design and test topics and solutions for IC test technology and fault-tolerant systems.
Testing Concepts.- Design Flow.- Design for Test.- Boundary Scan.- SOC Design for Testability.- System Modeling.- Test Conflicts.- Test Power Dissipation.- Test Access Mechanism.- Test Scheduling.-...
Design of System on a Chip is the first of two volumes addressing the design challenges associated with new generations of the semiconductor technology. The various chapters are the ...
This book is the second of two volumes addressing the design challenges associated with new generations of semiconductor technology. The various chapters are compiled from tutorials presented at...
Test Resource Partitioning for System-on-a-Chip is about test resource partitioning and optimization techniques for plug-and-play system-on-a-chip (SOC) test automation. ...
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