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The Cray X-MP/Model 24

A Case Study in Pipelined Architecture and Vector Processing

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Paperback / softback
02 July 2001
$121.54
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This book examines the issues relevant to the design of vector and pipelined computer systems using the Cray X-MP/24. The purpose of the book is to help the readers arrive at a deep understanding of how vector processing systems really work. These insights will be useful to the scientist who would like to obtain maximum performance from a vector machine, to the computer science student, and to the compiler writer. The book can also be used to supplement a regular textbook in a graduate or senior level course in computer architecture. The book looks at the overall design of the Cray X-MP and then explores the operation of the machine by looking at detailed timings of various instructions and code segments. It examines such issues as instruction issues and buffering, handling of jump instructions, use of registers to hold intermediate results, memory conflicts resulting from vectorization, optimal vectorization of multiple statement loops, and synchronization problems with multi-tasking. Detailed Gantt charts are provided to guide the reader through the timing issues.

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$121.54
In Stock: Ships in 7-9 Days
Hurry up! Current stock:

The Cray X-MP/Model 24

$121.54

Description

This book examines the issues relevant to the design of vector and pipelined computer systems using the Cray X-MP/24. The purpose of the book is to help the readers arrive at a deep understanding of how vector processing systems really work. These insights will be useful to the scientist who would like to obtain maximum performance from a vector machine, to the computer science student, and to the compiler writer. The book can also be used to supplement a regular textbook in a graduate or senior level course in computer architecture. The book looks at the overall design of the Cray X-MP and then explores the operation of the machine by looking at detailed timings of various instructions and code segments. It examines such issues as instruction issues and buffering, handling of jump instructions, use of registers to hold intermediate results, memory conflicts resulting from vectorization, optimal vectorization of multiple statement loops, and synchronization problems with multi-tasking. Detailed Gantt charts are provided to guide the reader through the timing issues.

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