This book considers the following problems in the domain of test and reliability of SRAM memories: optimizing test flow using stress conditions; statistical simulation for very low probabilities; variability analysis of an SRAM test-chip; fault tolerance in random addressed memories. Although the problems considered are all related to SRAM, some solutions found may also be applied in other domains. The Monte-carlo based simulation method described here is a general purpose method. The fault tolerance technique proposed can be used in different kind of memories, and its mathematical formulation can also be applied in other domains like logic synthesis for example. The methodology proposed to optimally set stress conditions during SRAM test can be adapted to any kind of circuit. The author covers SRAM problems and proposes innovative solutions that can be applied or adapted to different contexts.
This book considers the following problems in the domain of test and reliability of SRAM memories: optimizing test flow using stress conditions; statistical simulation for very low probabilities; variability analysis of an SRAM test-chip; fault tolerance in random addressed memories. Although the problems considered are all related to SRAM, some solutions found may also be applied in other domains. The Monte-carlo based simulation method described here is a general purpose method. The fault tolerance technique proposed can be used in different kind of memories, and its mathematical formulation can also be applied in other domains like logic synthesis for example. The methodology proposed to optimally set stress conditions during SRAM test can be adapted to any kind of circuit. The author covers SRAM problems and proposes innovative solutions that can be applied or adapted to different contexts.
Success in the development of recent advanced semiconductor device technologies is due to the success of SRAM memory cells. This book addresses various issues for designing SRAM memory cells for...
Modern electronics depend on nanoscaled technologies that present new challenges in terms of testing and diagnostics. Memories are particularly prone to defects since they exploit the technology...
This tutorial presents 14 papers that provide an overview of software reliability models, testing techniques, and applications. The book is targeted toward design engineers software engineers,...
The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with...
CMOS digital ICs are enabling the technology for the modern information age. Digital systems handle large amounts of information at high speeds. Such products demand low-priced memories with...
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