Deep Sub-Micron (DSM) processes present many changes to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is crosstalk, which becomes significant with shrinking feature sizes of VLSI fabrication processes. The presence of crosstalk greatly limits the speed and increases the power consumption of the IC design.
This book focuses on crosstalk avoidance with bus encoding, one of the techniques that selectively mitigates the impact of crosstalk and improves the speed and power consumption of the bus interconnect. This technique encodes data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improve the bus speed and/or energy consumption.
On and Off-Chip Crosstalk Avoidance in VLSI Design
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$270.00
Description
Deep Sub-Micron (DSM) processes present many changes to Very Large Scale Integration (VLSI) circuit designers. One of the greatest challenges is crosstalk, which becomes significant with shrinking feature sizes of VLSI fabrication processes. The presence of crosstalk greatly limits the speed and increases the power consumption of the IC design.
This book focuses on crosstalk avoidance with bus encoding, one of the techniques that selectively mitigates the impact of crosstalk and improves the speed and power consumption of the bus interconnect. This technique encodes data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improve the bus speed and/or energy consumption.
The book provides accurate FDTDmodels for on-chip interconnects, covering most recent advancements inmaterials and design. Furthermore, depending on the geometry and physicalconfigurations, different...
This book provides a comprehensive overview of the VLSI design process. It covers end-to-end system on chip (SoC) design, including design methodology, the design environment, tools, choice of design...
The art of transforming a circuit idea into a chip has changed permanently. Formerly, the electrical, physical and geometrical tasks were predominant. Later, mainly net lists of gates had to be...
This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both...
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