This work covers field programmable gate array(FPGA)-specific optimizations of circuits computing the multiplication of avariable by several constants, commonly denoted as multiple constantmultiplication (MCM). These optimizations focus on low resource usage but highperformance. They comprise the use of fast carry-chains in adder-based constantmultiplications including ternary (3-input) adders as well as the integrationof look-up table-based constant multipliers and embedded multipliers to get theoptimal mapping to modern FPGAs. The proposed methods can be used for theefficient implementation of digital filters, discrete transforms and many othercircuits in the domain of digital signal processing, communication and imageprocessing.
Multiple Constant Multiplication Optimizations for Field Programmable Gate Arrays
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This work covers field programmable gate array(FPGA)-specific optimizations of circuits computing the multiplication of avariable by several constants, commonly denoted as multiple constantmultiplication (MCM). These optimizations focus on low resource usage but highperformance. They comprise the use of fast carry-chains in adder-based constantmultiplications including ternary (3-input) adders as well as the integrationof look-up table-based constant multipliers and embedded multipliers to get theoptimal mapping to modern FPGAs. The proposed methods can be used for theefficient implementation of digital filters, discrete transforms and many othercircuits in the domain of digital signal processing, communication and imageprocessing.
Timely, authoritative, application-oriented. an in-depthexploration of current and future uses of FPGAs in digital systemsThe development of field-programmable gate arrays (FPGAs) may wellbe the most...
Short turnaround has become critical in the design of electronic systems. Software- programmable components such as microprocessors and digital signal processors have been used extensively in such...
Embedded systems applications that are either mission or safety-critical usually entail low- to mid- production volumes, require the rapid development of specific tasks, which are typically computing...
This research implements a circuit reconfiguration system (CRS) to reconfigure a field programmable gate array (FPGA) in response to a faulty configurable logic block (CLB). It is assumed the...
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