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JOP

A Java Optimized Processor for Embedded Real-Time Systems

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03 July 2008
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This thesis presents a Java processor designed for time-predictable execution of real-time tasks. JOP (Java Optimized Processor) is the implementation of the Java virtual machine in hardware. JOP is intended for applications in embedded real-time systems and the primary implementation technology is in a field programmable gate array. This research demonstrates that a hardware implementation of the Java virtual machine results in a small design for resource-constrained devices. Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches and branch prediction. However, these features complicate worst-case execution time (WCET) analysis and lead to very conservative WCET estimates. This thesis tackles this problem from the architectural perspective - by introducing a processor architecture in which simpler and more accurate WCET analysis is more important than average case performance. The proposed processor and the Java real-time profile have been used with success to implement several commercial real-time applications.

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    Product Details
    ISBN-13
    9783836480864
    Author
    Martin Schoeberl
    Publisher
    KS OmniScriptum Publishing
    Published
    03 July 2008
    Format
    Paperback / softback

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    RRP: $103.24
    $101.69
    Ships in 3-5 business days

    Delivery estimate

    Hurry up! Current stock:

    JOP

    RRP: $103.24
    $101.69

    Description

    This thesis presents a Java processor designed for time-predictable execution of real-time tasks. JOP (Java Optimized Processor) is the implementation of the Java virtual machine in hardware. JOP is intended for applications in embedded real-time systems and the primary implementation technology is in a field programmable gate array. This research demonstrates that a hardware implementation of the Java virtual machine results in a small design for resource-constrained devices. Architectural advancements in modern processor designs increase average performance with features such as pipelines, caches and branch prediction. However, these features complicate worst-case execution time (WCET) analysis and lead to very conservative WCET estimates. This thesis tackles this problem from the architectural perspective - by introducing a processor architecture in which simpler and more accurate WCET analysis is more important than average case performance. The proposed processor and the Java real-time profile have been used with success to implement several commercial real-time applications.

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