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Fault-Tolerant Digital Microfluidic Biochips

Compilation and Synthesis

Paul Pop

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Hardback
15 September 2015
$184.00
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This book describes for researchers in the fields of compiler technology, design and test, and electronic design automation the new area of digital microfluidic biochips (DMBs), and thus offers a new application area for their methods. The authors present a routing-based model of operation execution, along with several associated compilation approaches, which progressively relax the assumption that operations execute inside fixed rectangular modules. Since operations can experience transient faults during the execution of a bioassay, the authors show how to use both offline (design time) and online (runtime) recovery strategies. The book also presents methods for the synthesis of fault-tolerant application-specific DMB architectures.

· Presents the current models used for the research on compilation and synthesis techniques of DMBs in a tutorial fashion;

· Includes a set of "benchmarks", which are presented in great detail and includes the source code of most of the techniques presented, including solutions to the basic compilation and synthesis problems;

· Discusses several new research problems in detail, using numerous examples.

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$184.00
Ships in 3-5 business days
Hurry up! Current stock:

Fault-Tolerant Digital Microfluidic Biochips

$184.00

Description

This book describes for researchers in the fields of compiler technology, design and test, and electronic design automation the new area of digital microfluidic biochips (DMBs), and thus offers a new application area for their methods. The authors present a routing-based model of operation execution, along with several associated compilation approaches, which progressively relax the assumption that operations execute inside fixed rectangular modules. Since operations can experience transient faults during the execution of a bioassay, the authors show how to use both offline (design time) and online (runtime) recovery strategies. The book also presents methods for the synthesis of fault-tolerant application-specific DMB architectures.

· Presents the current models used for the research on compilation and synthesis techniques of DMBs in a tutorial fashion;

· Includes a set of "benchmarks", which are presented in great detail and includes the source code of most of the techniques presented, including solutions to the basic compilation and synthesis problems;

· Discusses several new research problems in detail, using numerous examples.

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