There are many systems which uses RAM as it's primary memory for example spacecraft, our home computer etc. Energy efficient RAM is even more important in outer space exploration as the power source is very limited and the environmental condition is very extreme. Energy efficiency is not only based on the architecture of the system but also on the environmental condition. Therefore energy efficient RAM will increase the performance of the system even in the extreme condition. In this work, we are going to design a RAM that will energy efficient even in extreme condition. Four different FPGA are taken under consideration and our RAM design is implemented on these four ICs and we find the most energy efficient architecture among these four architectures taken into consideration. There is reduction in power consumption when we migrate our RAM design from Kintex-7 architecture to Artix-7 Architecture.The result are obtained by using Xillinx Vivado 19.1 simulator with verilog hardware description language.
Energy Efficient Design Of RAM And It's Implementation on FPGA
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There are many systems which uses RAM as it's primary memory for example spacecraft, our home computer etc. Energy efficient RAM is even more important in outer space exploration as the power source is very limited and the environmental condition is very extreme. Energy efficiency is not only based on the architecture of the system but also on the environmental condition. Therefore energy efficient RAM will increase the performance of the system even in the extreme condition. In this work, we are going to design a RAM that will energy efficient even in extreme condition. Four different FPGA are taken under consideration and our RAM design is implemented on these four ICs and we find the most energy efficient architecture among these four architectures taken into consideration. There is reduction in power consumption when we migrate our RAM design from Kintex-7 architecture to Artix-7 Architecture.The result are obtained by using Xillinx Vivado 19.1 simulator with verilog hardware description language.
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