High Performance Design Automation for Multi-Chip Modules

Today's electronics industry requires new design automation methodologies that allow designers to incorporate high performance integrated circuits into smaller packaging. The aim of this book is to provide current and future techniques and algorithms of high performance multichip modules and other packaging methodologies. Technical papers in this issue cover: design optimization and physical partitioning; global routing/multi-layer assignment; timing-driven interconnection design (timing models, clock and power design); crosstalk, reflection, and simultaneous switching noise minimization; yield optimization; defect area minimization; low-power physical layout; design methodologies. Two tutorial reviews review some of the most significant algorithms previously developed for the placement/partitioning, and signal integrity issues, respectively. The remaining articles review the trend of prime design automation algorithms to solve the above eight problems arisen in MCM and other packages.